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TECHNICAL DATA
IN74HC221A Dual Monostable Multivibrator
The IN74HC221A is identical in pinout to the LS/ALS221. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. There are two trigger inputs, A INPUT (negative edge) and B INPUT (positive edge). These inputs are valid for rising/falling signals The device may also be triggered by using the RESET input (positiveedge) because of the Schmitt-trigger input; after triggering the output maintains the MONOSTABLE state for the time period determined by the external resistor REXT and capacitor CEXT. Taking RESET low breaks this MONOSTABLE STATE. If the next trigger pulse occurs during the MONOSTABLE period it makes the MONOSTABLE period longer. * Outputs Directly Interface to CMOS, NMOS, and TTL * Operating Voltage Range: 3.0 to 6.0 V * Low Input Current: 1.0 A * High Noise Immunity Characteristic of CMOS Devices
N SUFFIX PLASTIC 16 1 16 1 D SUFFIX SOIC
ORDERING INFORMATION IN74HC221AN Plastic IN74HC221AD SOIC TA = -55 to 125 C for all packages
PIN ASSIGNMENT LOGIC DIAGRAM
1A 1B 1RESET
DEXT CEXT REXT CEXT DEXT REXT
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
V CC 1REXT/CEXT 1CEXT 1Q 2Q 2RESET 2B 2A
1Q 2Q 2CEXT 2REXT/CEXT GND
FUNCTION TABLE
PIN 16 =VCC PIN 8 = GND Note (1) CEXT, REXT, DEXT are external components. (2) DEXT is a clamping diode. The external capacitor is charged to VCC in the stand-by state, i.e. no trigger. When the supply voltage is turned off CX is discharged mainly through an internal parasitic diode. If CX is sufficiently large and VCC decreases rapidy, there will be some possibility of damaging the I.C. with a surge current or latch-up. If the voltage supply filter capacitor is large enough and VCC decrease slowly, the surge current is automatically limited and damage the I.C. is avoided. The maximum forward current of the parasitic diode is approximately 20 mA. A Inputs B H X H L L X H X L L H L X RESET H H H H L* L
*
Outputs Q Q
Note Output Enable
H* H
*
Inhibit Inhibit Output Enable Output Enable Inhibit
X = don't care * - except for monostable period
Rev. 00
IN74HC221A
MAXIMUM RATINGS*
Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL
*
Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP SOIC Package** Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
**
Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5 A, B, RESET CEXT, REXT 20 30 25 50 750 500 -65 to +150 260
Unit V V V mA mA mA mW C C
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. ** Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT TA tr, tf Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time - RESET (Figure 2) A or B RX CX
*
Min 3.0 0 -55 VCC =2.0 V VCC =4.5 V VCC =6.0 V VCC <4.5 V VCC 4.5 V 0 0 0 10 2.0 0
*
Max 6.0 VCC +125 1000 500 400 No Limit 1000 1000 No Limit
Unit V V C ns
External Timing Resistor External Timing Capacitor
k F
The IN74HC221A will function at 2.0 V but for optimum pulse width stability, VCC should be above 3.0 V.
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
Rev. 00
IN74HC221A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol Parameter Test Conditions VCC V Guaranteed Limit -55C to 25 C 0.3 0.9 1.2 1.5 3.15 4.2 0.1 0.1 0.1 0.26 0.26 1.9 4.4 5.9 3.98 5.48 -0.1 0.1 8.0 85 C 0.3 0.9 1.2 1.5 3.15 4.2 0.1 0.1 0.1 0.33 0.33 1.9 4.4 5.9 3.84 5.34 -1.0 1.0 80 125 C 0.3 0.9 1.2 1.5 3.15 4.2 0.1 0.1 0.1 0.4 0.40 1.9 4.4 5.9 3.70 5.2 -1.0 1.0 160 A A A V V Unit
VIL
Maximum Low -Level Input Voltage Minimum High-Level Input Voltage Maximum Low-Level Output Voltage
VOUT 0.1 V or VCC=0.1 V IOUT 20 A VOUT 0.1 V or VCC=0.1 V IOUT 20 A VIN=VIH or VIL IOUT 20 A VIN=VIH or VIL IOUT 4.0 mA VIN=VIH or VIL IOUT 5.2 mA
2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 6.0
VIH
V
VOL
V
VOH
Minimum High-Level Output Voltage
VIN=VIH or VIL IOUT -20 A VIN=VIH or VIL IOUT -4.0 mA VIN=VIH or VIL IOUT -5.2 mA
IIL IIH ICC
Maximum Low-Level Output Current Minimum High-Level Input Current Maximum Quiescent Supply Current (per Package) Standby State Maximum Supply Current (per Package) Active State
VIL=GND VIH=VCC VIL=GND VIH=VCC VIL=GND VI=VCC IOUT=0 A VIL=GND VIH=VCC IOUT=0 A VIN = 0.5 VCC
ICC1
2.0 4.5 6.0
0.08 1.0 2.0
0.11 1.3 2.6
0.13 1.6 3.2
mA
Rev. 00
IN74HC221A
AC ELECTRICAL CHARACTERISTICS
Symbol Parameter Test Conditions VIL=0 V VIH=VCC tLH=tHL=6 ns CL=50 pF CEXT=0 REXT=5 k VCC V 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 VIL=0 V VIH=VCC tLH=tHL=6 ns CL=50 pF CEXT=0 REXT=5 k 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 VIL=0 V VIH=VCC tLH=tHL=6 CL=50 pF 2.0 4.5 6.0 5.0 Guaranteed Limit -55C to 25C 180 36 31 180 36 31 195 39 33 220 44 37 245 49 42 200 40 34 75 16 14 10 20 85 C 225 45 38 225 45 38 245 49 42 275 55 47 305 61 52 250 50 43 95 20 17 10 20 180* 125 C 270 54 46 270 54 46 295 59 50 330 66 56 370 74 63 300 60 51 110 22 20 10 20 ns ns ns Unit
tPHL
Maximum Propagation Delay
A, B - Q
RESET - Q
RESET - Q
tPLH
Maximum Propagation Delay
A, B - Q
RESET - Q
RESET - Q
tTLH, tTHL
Maximum Output Transition Time, Any Output(Figures 2 and 3) Maximum Input Capacitance A, B, RESET CX, RX
CIN CPD
pF pF
Power Dissipation Capacitance (Per Multivibrator) PD=CPDVCC2f+ICCVCC Minimum Recovery Time, Inactive to A or B (Figure 2) Minimum Pulse Width A, RESET VIL=0 V VIH=VCC tLH=tHL=6 CL=50 pF VIL=0 V VIH=VCC tLH=tHL=6 ns CL=50 pF CEXT=0 REXT=5 k EXT =0 REXT=5 k EXT =1 nF REXT=10 k EXT =1 F REXT=10 k
trec
2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 5.0 2.0 4.5 6.0 2.0 4.5 6.0
100 20 17 25 9 7 30 11 9
125 25 21 95 19 16 115 23 20 105* 0.80* 0.75* 0.70* 80* 75* 70*
150 30 26 110 22 19 135 27 23
ns
tw
ns
B
tWQ
Minimum Pulse Width (Figure 4)
ns s
*
=2510C
Rev. 00
IN74HC221A
Figure 1. Switching Waveforms
RESET
Figure 2. Switching Waveforms
Figure 3. Test Circuit
Rev. 00
IN74HC221A
TIMING DIAGRAM
REXT/CEXT
EXPANDED LOGIC DIAGRAM
REXT/CEXT
CEXT
Rev. 00
IN74HC221A
N SUFFIX PLASTIC DIP (MS - 001BB)
A
Dimension, mm
16 9 B 1 8
Symbol A B C
MIN 18.67 6.1
MAX 19.69 7.11 5.33
F
L
D F
0.36 1.14 2.54 7.62 0 2.92 7.62 0.2 0.38
0.56 1.78
C -T- SEATING N G D 0.25 (0.010) M T K
PLANE
G H
H J
M
J K L M N
10 3.81 8.26 0.36
NOTES: 1. Dimensions "A", "B" do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side.
D SUFFIX SOIC (MS - 012AC) Dimension, mm
A 16 9
Symbol A
MIN 9.8 3.8 1.35 0.33 0.4 1.27 5.72 0 0.1 0.19 5.8 0.25
MAX 10 4 1.75 0.51 1.27
H
B
P
B C
1
G
8 C R x 45
D F G
J F M
-TD 0.25 (0.010) M T C M K
SEATING PLANE
H J K M P R
8 0.25 0.25 6.2 0.5
NOTES: 1. Dimensions A and B do not include mold flash or protrusion. 2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B 0.25 mm (0.010) per side.
Rev. 00

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